The present invention relates to a semiconductor device with a silicide film and to a method of fabricating such a semiconductor device. This invention pertains particularly to providing an improved structure for a contact portion between silicide and upper-level wiring or upper low-resistance metal.
In recent years, the level of VLSI integration and density has been improved dramatically. A technique, known in the art as self-aligned silicidation (SALICIDE), has been used. In a SALICIDE technique, a metal silicide film is formed, in self-aligned manner, on a gate electrode and source/drain region of a MOS transistor incorporated into a VLSI, for reduction of the sheet resistance of the gate electrode and source/drain region and for reduction of the parasitic resistance such as contact resistance and diffusion resistance, to improve the operation rate of semiconductor element.
Various methods of forming a buried layer composed of aluminum, tungsten and copper on top of a metal silicide film, have been proposed. One such formation technique is a high-temperature sputtering method which makes utilization of the flowability of aluminum alloy at high temperature. Another formation technique is a CVD (chemical vapor deposition) method which is known to provide good step coverage. More specifically, a metal, such as aluminum, tungsten and copper, is selectively deposited in a connection hole, to form a highly reliable buried layer. However, this may produce the problem that reaction occurs at a location where the metal forming the buried layer and a metal silicide film contact with each other. In other words, each of high-temperature sputtering, selective CVD and CVD for formation of upper-level wiring undergoes thermal hysterisis of approximately 450-600 degrees centigrade. Due to the thermal hysterisis, the aforesaid reaction occurs to produce a reaction product. The silicon substrate is eroded by this reaction product and junction leakage may occur. In order to control and suppress such reaction, it is a general practice to form a barrier metal such as titanium nitride between a buried layer and a metal silicide film.
With reference to FIGS. 15(a)-(d), a commonly-used method is illustrated in which a buried layer is formed on a metal silicide film by high-temperature sputtering.
Referring first to FIG. 15(a), a MOS transistor is formed overlying an active region that is surrounded by field oxide film 2 on top of silicon substrate l. The MOS transistor comprises gate oxide film 3 of silicon oxide, gate electrode 5 of polysilicon, side-wall 9 of silicon oxide and source/drain region 4 formed by doping of impurities into silicon substrate 1. This is followed by deposition of, for example, a titanium film on source/drain region 4 and on the gate electrode 5 of the MOS transistor by sputtering. An anneal of from 600 to 900 degrees centigrade is performed and unreacted titanium films are stripped using an H.sub.2 SO.sub.4 --H.sub.2 O.sub.2 combined solution. As a result, titanium silicide film 6 is selectively formed, more specially, only on source/drain region 4 and gate electrode 5.
Next, as shown in FIG. 15(b), insulator film 7 is formed overlying the entire surface of the substrate and connection hole 8 is formed in insulator film 7, extending to titanium silicide film 6 of source/drain region 4.
Referring to FIG. 15(c), (a) titanium as a titanium film for providing an improved characteristic of contact with titanium silicide film 6 on the source/drain region 4 and (b) titanium nitride as a barrier metal, are deposited in connection hole 8 as well as on insulator film 7 by sputtering to form titanium nitride/titanium film 19.
As shown in FIG. 15(d), titanium is sputtered and an aluminum alloy is then sputtered at 500 degrees centigrade.
Al--Ti compound layer 15, resulting from combination of titanium and aluminum alloy, is formed and aluminum alloy film 16 is formed overlying Al--Ti compound layer 15. At this time, heat of reaction between Al and Ti is utilized, whereby connection hole 8 is filled with the aluminum alloy. Titanium nitride film 19, Al--Ti compound layer 15 and aluminum alloy film 16 are patterned by photolithography, to form metal wiring.
As the miniaturization of semiconductor device dimensions advances the miniaturization of connection hole diameter likewise advances. The deposition of titanium nitride film 19 by sputtering is not recommendable in the FIG. 15(c) process step. The reasons are as follows.
(1) Generally speaking, titanium nitride films, formed by sputtering, are poor in step coverage. This results in formation of an overhang at a corner of an upper portion of a connection hole, therefore preventing a flow of an aluminum alloy into the connection hole at the high-temperature sputtering time. Such a connection hole with an overhang suffers difficulty in being filed with aluminum alloy (see Y. Takegawa et al. Ext. Abst. SSDM, p. 558, 1993).
(2) To cope with such a problem, there is proposed a technique. In this technique, at the time of forming a titanium nitride film, titanium is sputtered through a honeycomb-like filter (collimator) in a flow of N.sub.2 gas, to control the formation of overhangs. However, use of the collimator is likely to generate particles.
(3) In a process step shown in FIG. 15(b), an area other than connection hole 8, i.e., the area on insulator film 7, is also covered with titanium nitride/titanium film 19. This covering makes it impossible to employ a particular method (e.g., a selective CVD method which makes utilization of a difference between underlying layers) for selectively depositing a metal, such as aluminum, tungsten and copper, only in connection hole 8.
Various techniques have been proposed with a view to avoiding the above-noted problem. For instance, Shinriki et al. propose a technique (Ext. Abst. SSDM, p.968, 1994). In the technique, after formation of a connection hole an anneal is carried out in an ambient of NH.sub.3 at a temperature of approximately 850 degrees centigrade without deposition of titanium nitride/titanium film 19, to form a titanium nitride film on top of a titanium silicide film. This is followed by selective deposition of aluminum only in the connection hole by selective CVD.
The above-described technique, however, produces the problem that, if heat in excess of 800 degrees centigrade is applied to a silicide of titanium, boron present in a source/drain region is driven into the titanium silicide. The value of the saturation current of p-channel transistors may decrease. Additionally, some metal silicides undergo silicide agglomeration when subjected to a high-temperature treatment, which results in an increase in sheet resistance of the source/drain region. The type of silicide applicable in the aforesaid conventional method is limited.
Such inconvenience occurs not only between a buried layer in a connection hole and a silicide film, it also occurs in forming a low-resistance metal film on top of a silicide film. This is a cause of decreasing reliability in a laminated structure of silicide and metal.